In a dual damascene architecture, wiring patterns are etched into a dielectric, or insulating layer. See, e.g., Handbook of semiconductor interconnection technology, edited by Schwartz et al., Marcel Dekker 1998; and Copper—Fundamental Mechanisms for Microelectronic Applications, Murarka et al., Wiley 2000. The conductor material (typically copper) is then inlaid into those features. There are two types of features used for this purpose: trenches, which form the actual wiring template; and vias, which make connection to the metal level below. Creating such structures requires two passes through the photo-lithography process. Either the vias are formed first and then the trenches or vice versa.
The dielectric stack requirements for dual damascene include the primary insulating layer and a thin copper diffusion barrier or selective metal barrier. Additional layers may be included to facilitate fabrication, such as an intermediate etch stop, hard mask, etc.
An anti-reflective layer (or ARL) is often used for photolithographic processes. The ARL minimizes the total reflection of light from layers under the photoresist and the interface between the photoresist layer and the underlying layer. By adjusting the thickness, t, refractive index, n, and extinction coefficient, k, of the ARL film, as shown in FIG. 1, a destructive interference can be obtained in the photoresist with equivalent intensities of incident and reflective light. As a result, zero reflectivity can be reached under ideal conditions. Thus, an ARL improves the accuracy of pattern transfer when the photoresist is developed.
FIG. 2 show a schematic diagram of a simplified lithography process flow of the via-first dual damascene applications. Typically, anti-reflective layer 18 is deposited onto underlying layer 12, which is being patterned over the other film stack. Photoresist 10 is then spun onto top of the anti-reflective layer. See, FIG. 2 (a). The process proceeds through (b) via photoresist development to (c) via etch to (d) via photoresist removal and cleaning to (e) or (e1) trench photoresist coating and (f) or (f1) trench photoresist development. The exposed portion of the photoresist layer 10 is removed when photoresist layer 10 is developed, yielding the clean vertical walls shown in FIG. 2(b) when UV radiation is incident on area of the top surface of photoresist layer 10, exposing a portion of the photoresist layer 10. When developed, the trench should be patterned properly and yielded vertical wall, as shown in FIG. 2(f).
However, this identity in pattern after the development step is not always realized. More specifically, silicon dioxide (SiO2) historically has been used as the primary interconnect insulating layer. With device geometries shrinking and speeds increasing, the trend now is towards insulating materials with lower dielectric constants (low-k). One of the most persistent difficulties associated with the integration of the low-k film has been its interaction with photoresists used with deep UV radiation (“DUV”, i.e., radiation having a wavelength of 248 nm and below). Low-k films often contain a small amount of nitrogen, present in the form of NHx (amines). The NHx species can diffuse rapidly through low-k dielectric films, such as would be used in layer 12. Such groups are known to react in a detrimental fashion with DUV photoresists by neutralizing the photo-acid catalyst. The result is footing or bridging of the printed features. These footings narrow the opening in the photoresist which results in poor pattern transfer to the underlying layers. See, FIG. 3.
To alleviate this phenomenon, a hard mask could be incorporated on top of the low-k film. This approach is very costly and is limited to hard masks that are barriers to the diffusion of amines (i.e., low k hard masks would not be suitable.) Moreover, the use of a hard mask will be effective only for single layer lithography; e.g., printing vias for via-first dual damascene, or trenches in the case of trench-first. However, after formation of those features into the dielectric, DUV resist would once again come in contact with low-k film during the next pass through lithography. The result would be regions of undeveloped resist in the second pass lithography features. For example, in the case of via-first patterning, the appearance of “mushrooms” or “rivet heads” over the vias (also filled with resist) in the trench regions. A DUV photoresist “mushroom” is illustrated schematically in FIG. 2(f1) and demonstrated in a SEM picture shown in FIG. 4.
Organic layers have been commonly used as ARLs for I-line radiation (i.e., radiation having a wavelength of 365 nm), although inorganic layers can also be used. Layers of inorganic materials such as silicon oxynitride are often used for deep UV radiation. For a discussion of the use of deep UV ARLs, see T. Ogawa et al.; “Practical Resolution Enhancement Effect By New Complete Anti-Reflective Layer In KrF Excimer Laser Lithography”; Optical/Laser Microlithography; Session VI; Vol. 1927 (1993), incorporated herein by reference. For a general discussion of the use of ARLs, see T. Perara, “Anti-Reflective Coatings: An Overview”; Solid State Technology, Vol. 37, No. 7; pp. 131–136 (1995), which is incorporated herein by reference.
There is a need for a simpler approach to deposit an ARL film with elimination of the photoresist footing problem and photoresist poisoning (mushroom) problem in dual damascene processes. It would be desirable for the ARL film to be optically and thermally stable, to be chemically inert to the environments to which it is exposed, and to be applicable for use with any wavelength of UV radiation. In addition, the ARL film should have good adhesion to commonly used materials and have good mechanical and structural integrity. Finally, it would be desirable to provide a single continuous process for producing the ARL film with acceptable uniformity across the wafer.